; ; Author: Hans Summers G0UPL ; Update: 29-Nov-06 ; Function: LCD test ; .include "tn2313def.inc" ; Define chip particulars .def pwmdir = r2 ; Holds direction PWM was stepped in .def actual = r3 ; Holds the Actual flag .def heating = r4 ; Timer to allow the heater time to heat up! .def pwmstep = r5 ; PWM step size .def pwml = r6 ; PWM low byte .def pwmh = r7 ; PWM high byte .def lcdstat = r8 ; LCD busy/wait status .def longtime= r9 ; Long timer for powerup .def toggle = r10 ; for toggle value .def tVal = r11 ; Timer0 value .def tValLast= r12 ; Timer0 value last time .def wreg = r16 ; General use working register .def leadzero= r17 ; Display longitude leading zeros flag .def byteA0 = r18 ; byteA0..byteA4 for binary to bcd conversion. .def byteA1 = r19 .def byteA2 = r20 .def byteA3 = r21 .def byteA4 = r22 .def temp = r23 ; Temporary register .def test = r24 ; test register .def nmeacnt = r25 ; NMEA parsing state .equ lcdrs = PD6 ; LCD rs pin connected to PD6 .equ lcdrw = PD5 ; LCD r/w pin connected to PD5 .equ lcde = PD4 ; LCD e pin connected to PD4 .equ valid = PD3 ; Valid output signal is PD3 .equ line1 = 0x80 ; 1st row of LCD .equ line2 = 0xC0 ; 2nd row of LCD .cseg .org $0000 rjmp reset ; $0000 Reset rjmp int0h ; $0001 External Interrupt0 reti ; $0002 External Interrupt1 reti ; $0003 Timer1 Capture reti ; $0004 Timerl CompareA reti ; $0005 Timer1 Overflow reti ; $0006 Timer0 Overflow rjmp usart0Rx ; $0007 USART0 RX Complete reti ; $0008 USART0 UDR Empty reti ; $0009 USART0 TX Complete reti ; $000A Analog Comparator reti ; $000B Pin Change Interrupt reti ; $000C Timerl Compare B reti ; $000D Timer0 Compare A reti ; $000E Timer0 Compare B reti ; $000F USI Start reti ; $0010 USI Overflow reti ; $0011 EEPROM Ready reti ; $0012 Watchdog Overflow .equ ASCII_0 = 48 .equ ASCII_A = 65 .equ ASCII_SPC = 32 .equ ASCII_DOT = 46 .equ ASCII_COMMA = 44 ; ASCII comma .equ STEPLARGE = 128 .equ STEPMEDIUM = 16 .equ STEPSMALL = 1 message1: .db "GPS 10MHz reference",0 message2: .db "Hans Summers G0UPL, 2007 ",0 nmea: ; .db "GPRMC ###### # #### ## #2##### ## #", 0, 0 ;.db "GPGSA # #2## ## ## ## ## ## ## ## ##", 0 ;.db "GPGGA ########################2########################", 0 lcd: .db "##:##:## a ##o##.##'#" lcdfreq: .db "xyyyyyyyyy d @@#o##.##'#", 0, 0 ;.db "# # ## ## ## ## ## ## ## ## ##############################", 0, 0 ;.db "################################################", 0, 0 ; 38528 reset: ldi wreg, RAMEND out SPL, wreg ; Init Stack Pointer rcall longdelay ; Delay some time rcall lcdinit ; Initialize LCD module rcall lcdclr ; Clear the LCD ldi nmeacnt, 0 ; Load NMEA count register with zero ldi wreg, 64 ; (1<>> r20r21r22r23r24 Bin2BCD20: mov r16,r20 ;for compatibility with Math32 mov r17,r21 ; Bin2BCD16: ldi r22,0xff ;initialize digit 4 binBCD_4: inc r22 ; subi r16,low(10000);subiw fbin,10000 sbci r17,high(10000) brcc binBCD_4 ; ldi r21,0x9f ;initialize digits 3 and 2 binBCD_3: subi r21,0x10 ; subi r16,low(-1000);subiw fbin,1000 sbci r17,high(-1000) brcs binBCD_3 ; binBCD_2: inc r21 ; subi r16,low(100) ;subiw fbin,100 sbci r17,high(100) ; brcc binBCD_2 ; ldi r20,0xa0 ;initialize digits 1 and 0 binBCD_1: subi r20,0x10 ; subi r16,-10 ;subi fbin,10 brcs binBCD_1 ; add r20,r16 ; binBCD_ret: ret ;* r18:r19:r20:r21 >>> r20:r21:r22:r23:r24 <== this one. ;* hex dec ;* r18r19r20r21 >>> r20r21r22r23r24 Bin4BCD: rcall Bin2BCD20 ; clr r23 ;initial highest bytes of result ldi r24,0xfe ; binBCD_loop: subi r20,-0x33 ;add 0x33 to digits 1 and 0 sbrs r20,3 ;if bit 3 clear subi r20,0x03 ; sub 3 sbrs r20,7 ;if bit 7 clear subi r20,0x30 ; sub $30 subi r21,-0x33 ;add 0x33 to digits 3 and 2 sbrs r21,3 ;if bit 3 clear subi r21,0x03 ; sub 3 sbrs r21,7 ;if bit 7 clear subi r21,0x30 ; sub $30 subi r22,-0x33 ;add 0x33 to digits 5 and 4 sbrs r22,3 ;if bit 3 clear subi r22,0x03 ; sub 3 sbrs r22,7 ;if bit 7 clear subi r22,0x30 ; sub $30 lsl r18 ; rol r19 ;shift lower word rol r20 ;through all bytes rol r21 ; rol r22 ; rol r23 ; rol r24 ; brmi binBCD_loop ;7 shifts w/o correction of MSD rol r17 ;since Bin2BCD r17 = 0xff brcc binBCD_ret ;shoot ; so as to do 16_lsl in total subi r23,-0x33 ;add 0x33 to digits 7 and 6 sbrs r23,3 ;if bit 3 clear subi r23,0x03 ; sub 3 sbrs r23,7 ;if bit 7 clear subi r23,0x30 ; sub $30 subi r24,-0x03 ;add 0x03 to digit 8 only sbrs r24,3 ;if bit 3 clear subi r24,0x03 ; sub 3 rjmp binBCD_loop ;